let S1, S2, S be non empty non void Circuit-like ManySortedSign ; :: thesis: ( InnerVertices S1 misses InputVertices S2 & S = S1 +* S2 implies for A1 being non-empty Circuit of S1
for A2 being non-empty Circuit of S2
for A being non-empty Circuit of S st A1 tolerates A2 & A = A1 +* A2 holds
for s being State of A
for s1 being State of A1
for s2 being State of A2 st s1 = s | the carrier of S1 & s2 = s | the carrier of S2 holds
Following s = (Following s1) +* (Following s2) )
assume that
A1: InnerVertices S1 misses InputVertices S2 and
A2: S = S1 +* S2 ; :: thesis: for A1 being non-empty Circuit of S1
for A2 being non-empty Circuit of S2
for A being non-empty Circuit of S st A1 tolerates A2 & A = A1 +* A2 holds
for s being State of A
for s1 being State of A1
for s2 being State of A2 st s1 = s | the carrier of S1 & s2 = s | the carrier of S2 holds
Following s = (Following s1) +* (Following s2)
A3: the carrier of S = the carrier of S1 \/ the carrier of S2 by A2, Def2;
let A1 be non-empty Circuit of S1; :: thesis: for A2 being non-empty Circuit of S2
for A being non-empty Circuit of S st A1 tolerates A2 & A = A1 +* A2 holds
for s being State of A
for s1 being State of A1
for s2 being State of A2 st s1 = s | the carrier of S1 & s2 = s | the carrier of S2 holds
Following s = (Following s1) +* (Following s2)
let A2 be non-empty Circuit of S2; :: thesis: for A being non-empty Circuit of S st A1 tolerates A2 & A = A1 +* A2 holds
for s being State of A
for s1 being State of A1
for s2 being State of A2 st s1 = s | the carrier of S1 & s2 = s | the carrier of S2 holds
Following s = (Following s1) +* (Following s2)
let A be non-empty Circuit of S; :: thesis: ( A1 tolerates A2 & A = A1 +* A2 implies for s being State of A
for s1 being State of A1
for s2 being State of A2 st s1 = s | the carrier of S1 & s2 = s | the carrier of S2 holds
Following s = (Following s1) +* (Following s2) )
assume that
A4: A1 tolerates A2 and
A5: A = A1 +* A2 ; :: thesis: for s being State of A
for s1 being State of A1
for s2 being State of A2 st s1 = s | the carrier of S1 & s2 = s | the carrier of S2 holds
Following s = (Following s1) +* (Following s2)
let s be State of A; :: thesis: for s1 being State of A1
for s2 being State of A2 st s1 = s | the carrier of S1 & s2 = s | the carrier of S2 holds
Following s = (Following s1) +* (Following s2)
let s1 be State of A1; :: thesis: for s2 being State of A2 st s1 = s | the carrier of S1 & s2 = s | the carrier of S2 holds
Following s = (Following s1) +* (Following s2)
let s2 be State of A2; :: thesis: ( s1 = s | the carrier of S1 & s2 = s | the carrier of S2 implies Following s = (Following s1) +* (Following s2) )
assume that
A6: s1 = s | the carrier of S1 and
A7: s2 = s | the carrier of S2 ; :: thesis: Following s = (Following s1) +* (Following s2)
A8: dom (Following s2) = the carrier of S2 by CIRCUIT1:3;
A9: dom (Following s1) = the carrier of S1 by CIRCUIT1:3;
A10: now :: thesis: for x being object st x in (dom (Following s1)) \/ (dom (Following s2)) holds
( ( x in dom (Following s2) implies (Following s) . x = (Following s2) . x ) & ( not x in dom (Following s2) implies (Following s) . x = (Following s1) . x ) )
let x be object ; :: thesis: ( x in (dom (Following s1)) \/ (dom (Following s2)) implies ( ( x in dom (Following s2) implies (Following s) . x = (Following s2) . x ) & ( not x in dom (Following s2) implies (Following s) . x = (Following s1) . x ) ) )
assume x in (dom (Following s1)) \/ (dom (Following s2)) ; :: thesis: ( ( x in dom (Following s2) implies (Following s) . x = (Following s2) . x ) & ( not x in dom (Following s2) implies (Following s) . x = (Following s1) . x ) )
then reconsider v = x as Vertex of S by A2, A9, A8, Def2;
hereby :: thesis: ( not x in dom (Following s2) implies (Following s) . x = (Following s1) . x )
assume x in dom (Following s2) ; :: thesis: (Following s) . x = (Following s2) . x
then reconsider v2 = x as Vertex of S2 by CIRCUIT1:3;
(InputVertices S2) \/ (InnerVertices S2) = the carrier of S2 by XBOOLE_1:45;
then ( v2 in InnerVertices S2 or v2 in InputVertices S2 ) by XBOOLE_0:def 3;
then ( v in InnerVertices S2 or ( v in the carrier of S2 & v in InputVertices S ) ) by A11;
hence (Following s) . x = (Following s2) . x by A2, A4, A5, A7, Th31; :: thesis: verum
end;
assume A15: not x in dom (Following s2) ; :: thesis: (Following s) . x = (Following s1) . x
then reconsider v1 = v as Vertex of S1 by A3, A8, XBOOLE_0:def 3;
rng the ResultSort of S2 c= the carrier of S2 by RELAT_1:def 19;
then A16: not v1 in rng the ResultSort of S2 by A8, A15;
A17: now :: thesis: ( v1 in InputVertices S1 implies v in InputVertices S )
assume v1 in InputVertices S1 ; :: thesis: v in InputVertices S
then A18: not v1 in rng the ResultSort of S1 by XBOOLE_0:def 5;
the ResultSort of S = the ResultSort of S1 +* the ResultSort of S2 by A2, Def2;
then rng the ResultSort of S c= (rng the ResultSort of S1) \/ (rng the ResultSort of S2) by FUNCT_4:17;
then not v in rng the ResultSort of S by A16, A18, XBOOLE_0:def 3;
hence v in InputVertices S by XBOOLE_0:def 5; :: thesis: verum
end;
(InputVertices S1) \/ (InnerVertices S1) = the carrier of S1 by XBOOLE_1:45;
then ( v1 in InnerVertices S1 or v1 in InputVertices S1 ) by XBOOLE_0:def 3;
hence (Following s) . x = (Following s1) . x by A2, A4, A5, A6, A17, Th31; :: thesis: verum
end;
dom (Following s) = the carrier of S by CIRCUIT1:3;
hence Following s = (Following s1) +* (Following s2) by A3, A9, A8, A10, FUNCT_4:def 1; :: thesis: verum